Features

T-EMU 2 comes with high performance processor cores and memory emulation. Major features include the following:

  • High performance emulator cores constructed using the LLVM toolchain. 70-80 % higher performance compared to the two other standard ERC32 and LEON emulators commonly used in industry.
  • Device models for common devices
  • Bus models for common busses
  • Memory model allowing for the insertion of custom cache models and fast address decoding.
  • Easy to use device modelling API in C, enabling dynamic model creation, automatic check-pointing, register inspection, and arbitrary memory address mapping. As the API is in C, it is easy to wrap it for various scripting languages, enabling tests to be written in e.g. Python.

It is easy to integrate T-EMU in existing simulators and although while T-EMU normally uses different callback for different devices, it is easy to include single MMIO callbacks if the need exist (as used in e.g. TSIM and the ESOC Emulator).

T-EMU supports the emulation of the following processors, devices and buses. Additional cores, devices and buses can be added when needed. Contact us for quotes.

Processor Cores

The following processor cores are supported by T-EMU 2, for the LEON3 and LEON4 cores, the AHB plug-and play mechanism effectively means that any system based on these cores can be emulated, including UT700 and NGMP.

  • ERC32
  • LEON2 (AT697E,AT697F,etc)
  • LEON3 (UT699,UT700,GR712RC,etc)
  • LEON4 (GR740,etc)

Device Models

T-EMU 2 currently supports the following device models.

  • MEC (ERC32)
  • LEON2 on-chip devices
  • GRLIB
    • AHBCTRL
    • AHBSTAT
    • APBCTRL
    • APBUART
    • CAN_OC
    • FTMCTRL
    • GPTIMER
    • GRSPW2
    • IRQMP
  • OpenCores
    • CAN_OC

Bus Models

T-EMU 2 supports the following busses out of the box.

  • AMBA (with PNP)
  • CAN
  • Serial
  • Signal
  • SpaceWire